Existing capacitor-coupled N-type transistor-based OTP devices can be categorized primarily into the following three types.
The first type of OTP device is shown in FIG. 1, which includes a transistor (depicted on the left) and a capacitor (depicted on the right). The transistor is formed in a P-well and has NLDD structures. The capacitor is in an N-well and has a PLDD structure. Source and drain doping of such a transistor is the same as that for an ordinary NMOS transistor. The capacitor has a bottom plate consisting of the N-well as well as of a heavily-doped P-region. This OTP device is, however, disadvantageous in that: since the transistor is sized at approximately 80% of an ordinary device, but has the same source and drain doping as an ordinary device, its efficiency and time window for hot carrier writing are limited. Moreover, the capacitor must have a relatively large area due to the size of the N-well of its bottom plate.
The second type of OTP device is shown in FIG. 2, which includes a transistor (depicted on the left) and a capacitor (depicted on the right), both formed in the same P-well. The transistor has NLDD structures, and the capacitor has a bulky N-doped region. Similarly, source and drain doping of the transistor is the same as that for an ordinary NMOS transistor. Additionally, the capacitor has a bottom plate formed by an additional N-type implantation. This OTP device is, however, disadvantageous in that: since the transistor is sized at approximately 80% of an ordinary device, but has the same source and drain doping as an ordinary device, its efficiency and time window for hot carrier writing are limited. Moreover, it requires an additional N-type implantation.
The third type of OTP device is shown in FIG. 3, which includes a transistor (depicted on the left) and a capacitor (depicted on the right), both formed in the same P-well. Each of the transistor and the capacitor has NLDD structure(s). Similarly, source and drain doping of the transistor is the same as that for an ordinary NMOS transistor. The capacitor has a bottom plate formed by a heavily-doped N-region stacked with a coupling capacitor. This OTP device is, however, disadvantageous in that: since the transistor is sized at approximately 80% of an ordinary device, but has the same source and drain doping as, an ordinary device, its efficiency and time window for hot carrier writing are limited. Moreover, the capacitor has a low coupling ratio and a large area.